1. Field of the Invention
The present invention relates to a chip shaped electronic device, such as a multilayer chip varistor, not requiring glass coating or other insulative protective layers, being tolerant of temperature changes, capable of maintaining high resistance of an element surface even in reflow soldering, being highly reliable, and can be easily produced, and a method of producing the same.
2. Description of the Related Art
In recent years, along with electronic devices becoming more compact and furthermore highly performing, chip shaped electronic devices have become essential. A chip shaped electronic device is normally arranged on a circuit substrate and subjected to heat treatment together with printed solder to form a circuit. This heat treatment is called reflow soldering processing. At this time, a flux having a strong reducing power is included in the solder, and a surface of the chip device is corroded thereby to end up declining insulative resistance in some cases.
A multilayer varistor is not exceptional as a chip shaped electronic device, and an element surface of the multilayer chip varistor is reduced by reflow soldering to bring disadvantages of declining insulative resistance and declining reliability.
To solve the disadvantages, a glass is coated on the element surface of a multilayer chip varistor for improving reliability (for example, refer to the patent article 1).
However, to cover the element surface by uniformly coating a glass takes much trouble. Also, since thermal expansion coefficients of a ceramic material and a glass material are different, the boundary is liable to be damaged by a temperature cycle, etc. Therefore, cracks may arise in a glass layer, and insulation of ceramic composing the element may be damaged.
Note that a method of diffusing Li or Na on the element surface to make the surface highly resistant has been proposed (refer to the patent article 2). In the invention described in this patent article, the ratio of SIMS ion intensity M1 of Li or Na on the element surface and SIMS ion intensity M2 of Li or Na of a portion at a depth of 10 xcexcm from the surface is made to be 10xe2x89xa6(M1/M2)xe2x89xa650000.
In this method, however, it was found that although imperfect appearance at the time of electric plating could be improved, it was not sufficient for reducing from a flux in the reflow soldering. Namely, since a reducing power of an activated flux at the time of reflow soldering was much larger than that of electric soldering, a thickness of 10 xcexcm or so of a range dispersed with Li or Na was not sufficient for reflow soldering.
Note that further compact electronic devices are demanded recently, and micro size chip shaped electronic devices having a size of, for example, 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less have been under development.
Patent Article 1: Japanese Unexamined Patent Publication No. 6-96907
Patent Article 2: Japanese Unexamined Patent Publication No. 9-246017
An object of the present invention is to provide a chip shaped electronic device, such as a multilayer chip varistor, not requiring glass coating or other insulative protective layers, being tolerant of temperature changes, capable of maintaining high resistance of an element surface even in reflow soldering, being highly reliable, and can be easily produced, and a method of producing the same.
Also, another object of the present invention is to provide a micro chip shaped electronic device (for example, having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less) having the above characteristics and a method of producing the same.
Chip Shaped Electronic Device
To attain the above objects, according to a first aspect of the present invention, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of an alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry (SIMS), 0.001xe2x89xa6(A/Zn)xe2x89xa6500.
In the first aspect, configurations of respective aspects described below are preferably applied.
According to the second aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Li and Zn, (Li/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, 0.001xe2x89xa6(Li/Zn)xe2x89xa6500.
According to the third aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Na and Zn, (Na/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, 0.001xe2x89xa6(Na/Zn)xe2x89xa6100.
According to a fourth aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of K and Zn, (K/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, 0.001xe2x89xa6(K/Zn)xe2x89xa6100.
According to a fifth aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Rb and Zn, (Rb/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, 0.001xe2x89xa6(Rb/Zn)xe2x89xa6100.
According to a sixth aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Cs and Zn, (Cs/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, 0.001xe2x89xa6(Cs/Zn)xe2x89xa6100.
In the first aspect, configurations of respective aspects described below are preferably applied.
According to a seventh aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when measuring an ion intensity ratio of Li and Zn, (Li/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(Li/Zn)xe2x89xa6500.
According to an eighth aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when measuring an ion intensity ratio of Na and Zn, (Na/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(Na/Zn)xe2x89xa6100.
According to a ninth aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when measuring an ion intensity ratio of K and Zn, (K/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(K/Zn)xe2x89xa6100.
According to a tenth aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when measuring an ion intensity ratio of Rb and Zn, (Rb/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry, it is 0.01xe2x89xa6(Rb/Zn)xe2x89xa6100.
According to an eleventh aspect, there is provided
a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when measuring an ion intensity ratio of Cs and Zn, (Cs/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry, it is 0.1xe2x89xa6(Cs/Zn)xe2x89xa6100.
Also, there is provided a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein
when measuring an ion intensity ratio of an alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(A/Zn)xe2x89xa6500.
In the first aspect, configurations of respective aspects described below are preferably applied.
According to a twelfth aspect, there is provided
a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane (a gap between terminals) is 50 xcexcm or more;
wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Li and Zn, (Li/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry (SIMS), it is 0.001xe2x89xa6(Li/Zn)xe2x89xa6500.
According to a thirteenth aspect, there is provided
a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Na and Zn, (Na/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(Na/Zn)xe2x89xa6100.
According to a fourteenth aspect, there is provided
a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of K and Zn, (K/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(K/Zn)xe2x89xa6100.
According to a fifteenth aspect, there is provided
a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Rb and Zn, (Rb/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(Rb/Zn)xe2x89xa6100.
According to a sixteenth aspect, there is provided
a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Cs and Zn, (Cs/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, it is 0.001 less than (Cs/Zn) less than 100.
According to a seventeenth aspect, there is provided
a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of an alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry, it is 0.001xe2x89xa6(A/Zn)xe2x89xa6500.
In the seventh and twelfth aspects, preferably, the ion intensity ratio is 0.01xe2x89xa6(Li/Zn)xe2x89xa6500.
A Method of Producing Chip Shaped Electronic Device
To attain the above aspects, according to a first aspect of the present invention, there is provided
a method of producing a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, and a pair of terminal electrodes formed on an outer surface of the element body, including the steps of:
forming the element body;
diffusing an alkali metal (A) from a surface of the element body to inside the element body; and
after that, forming on the outer surface of the element body the pair of terminal electrodes connected to the internal electrode layers;
wherein the alkali metal is diffused under a condition of attaining 0.001xe2x89xa6(A/Zn)xe2x89xa6500 when assuming a minimum distance from an outermost layer side of the internal electrode layers in the stacking direction to the surface of the element body is 1 at the time of diffusing the alkali metal and measuring an ion intensity ratio of the alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry.
In the first aspect, configurations of respective aspects described below are preferably applied.
According to a second aspect, there is provided
a method of producing a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, and a pair of terminal electrodes formed on an outer surface of the element body, including the steps of:
forming the element body;
forming on the outer surface of the element body terminal electrodes connected to the internal electrode layers; and
after that, diffusing an alkali metal (A) from a surface of the element body to inside the element body;
wherein the alkali metal is diffused under a condition of attaining 0.001xe2x89xa6(A/Zn)xe2x89xa6500 when assuming a minimum distance from an outermost layer side of the internal electrode layers in the stacking direction to the surface of the element body is 1 at the time of diffusing the alkali metal and measuring an ion intensity ratio of the alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry.
According to a third aspect, there is provided
a method of producing a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, including the steps of:
forming the element body;
diffusing an alkali metal (A) from a surface of the element body to inside the element body; and
after that, forming on the outer surface of the element body terminal electrodes connected to the internal electrode layers; and
wherein the alkali metal is diffused under a condition of attaining 0.001xe2x89xa6(A/Zn)xe2x89xa6500 when measuring an ion intensity ratio of the alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry.
According to a fourth aspect, there is provided
a method of producing a chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, including the steps of:
forming the element body;
forming on the outer surface of the element body terminal electrodes connected to the internal electrode layers; and
after that, diffusing an alkali metal (A) from a surface of the element body to inside the element body;
wherein the alkali metal is diffused under a condition of attaining 0.001xe2x89xa6(A/Zn)xe2x89xa6500 when measuring an ion intensity ratio of the alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of 100 xcexcm by a secondary ion mass spectrometry.
According to a fifth aspect, there is provided
a method of producing a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
including the steps of:
forming the element body;
diffusing an alkali metal (A) from a surface of the element body to inside the element body; and
after that, forming on the outer surface of the element body the pair of terminal electrodes connected to the internal electrode layers;
wherein the alkali metal is diffused under a condition of attaining 0.001 less than (A/Zn) less than 500 when assuming a minimum distance from an outermost layer side of the internal electrode layers in the stacking direction to the surface of the element body is 1 at the time of diffusing the alkali metal and measuring an ion intensity ratio of the alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry.
According to a sixth aspect, there is provided
a method of producing a chip shaped electronic device comprising:
an element body including zinc oxide material layers and internal electrode layers and having a size of 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less; and
a pair of terminal electrodes formed on an outer surface of the element body, wherein a distance between facing end portions on the same plane is 50 xcexcm or more;
including the steps of:
forming the element body;
forming on the outer surface of the element body the pair of terminal electrodes connected to the internal electrode layers; and
after that, diffusing an alkali metal (A) from a surface of the element body to inside the element body;
wherein the alkali metal is diffused under a condition of attaining 0.001xe2x89xa6(A/Zn)xe2x89xa6500 when assuming a minimum distance from an outermost layer side of the internal electrode layers in the stacking direction to the surface of the element body is 1 at the time of diffusing the alkali metal and measuring an ion intensity ratio of the alkali metal (A) and zinc (Zn), (A/Zn), in a range from the surface of the element body to a depth of (0.9xc3x971) by a secondary ion mass spectrometry.
Preferably, at the time of diffusing the alkali metal, the element body is subjected to heat treatment at a temperature of 700 to 1000xc2x0 C. in a state of being applied with powder of an alkali metal compound, and at least one of an application amount of the powder to the surface of the element body, a heat treatment temperature and a heat treatment time is controlled.
Common Items
Preferably, the above alkali metal (A) is at least one of Li, Na, K, Rb and Cs.
In the present invention, while the chip shaped electronic device is not particularly limited, preferably, the above element body has the configuration of alternately stacking zinc oxide voltage nonlinear resistor layers and internal electrode layers, and the chip shaped electronic device is a multilayer chip varistor.
Operation of the Present Invention
(1) The present invention is, in brief, a technique for letting single or a plurality of alkali metals, such as Li, Na, K, Rb and Cs, etc., contained in a range up to a predetermined depth including a surface of an element body including zinc oxide material layers and internal electrode layers.
(2) The present inventors found that when assuming a shortest distance from an outermost side in the stacking direction of an internal electrode layer to the surface of an element body is 1 regardless of a size of the element body in a multilayer chip varistor or other chip shaped electronic devices, and measuring an ion intensity ratio (alkali metal A/zinc Zn) of a range from the surface of the element body to a depth of (0.9xc3x971) and the ion intensity ratio is adjusted to be in a predetermined range, a decline of an insulation resistance value due to a flux in reflow soldering can be prevented and an insulation defective rate after the reflow soldering can be widely reduced.
The state of the range from the surface of the element body (any size) wherein an alkali metal is dispersed up to the depth of (0.9xc3x971) is not always clear, but it is considered that an alkali metal is dissolved in zinc oxide grains contained in the zinc oxide material layer positioned outside of the element body. In the present invention, by setting the ion intensity ratio to be in a predetermined range, a range from the surface of the element body to the depth (0.9xc3x971) becomes a high resistance layer and prevents a current from leaking on the element surface due to a reducing action of a flux by the reflow soldering. Accordingly, a decline of an insulation resistance value after the reflow soldering can be prevented and the insulation defective rate can be reduced.
(3) The present inventors found that the same effects as above can be obtained by adjusting the ion intensity ratio (alkali metal A/zinc Zn) of a range from the surface of the element body to a depth of 100 xcexcm when the size of the element body is not a micro size of, for example, more than 0.6 mmxc3x97more than 0.3 mmxc3x97a thickness of more than 0.3 mm.
Note that in a chip shaped electronic device of the present invention, M1/M2 defined in the patent article 2 becomes about 1, which is out of a range of 10xe2x89xa6(M1/M2)xe2x89xa650000 regulated in the patent article 2. However, the present inventors found for the first time that a decline of the insulation resistance value after reflow soldering can be prevented and the insulation defective rate can be reduced by setting to the range of the present invention.
(4) The present inventors also found the fact that it is preferable to apply the technique described in (2) above, not the technique in (3) particularly when the size of the element body is a micro size of, for example, 0.6 mm or lessxc3x970.3 mm or lessxc3x97a thickness of 0.3 mm or less. When applying the technique in the above (3) as it was to a chip wherein a size of the element body was a micro size, it was found that disadvantages below arose. Generally, a multilayer chip varistor as an example of chip shaped electronic devices causes varistor characteristics between two internal electrode layers adjacent to each other in the stacked direction in the element body. In the case of the above micro size chip, a distance between the internal electrode layer arranged at the outermost side among the internal electrode layers and the surface of the element body becomes less than 100 xcexcm in some cases. In this case, when an insulation layer is formed to a range of a depth of 100 xcexcm including the surface of the chip varistor element as proposed above, the above alkali metal sometimes diffuses even inside of the chip which is the inner side of the outermost side in the stacked direction of the internal electrode layers (between the internal electrodes causing the varistor characteristics) and electric characteristics may change by being affected thereby. Thus, when the size of the element body is a micro size, the same effect can be obtained by not applying the technique of (3) but the technique of (2).
Also, since a material having different thermal expansion coefficient, such as in the glass coating, is not used, it is tolerant of heat cycles. Also, insulation between terminals can be surely secured in a micro size chip having a narrower gap between terminals (corresponding to the reference number 5 in FIG. 4) not by glass coating or other insulation methods (not only that glass coating is hard to apply in a micro size chip shaped electronic device but, when it is applied, chip becomes roundish with the glass and affects when being mounted). Therefore, the electronic device can maintain the high reliability.
(5) Also, in the present invention, a high resistance layer is formed by adhering an alkali metal supply source on the surface of the element body and diffusing an alkali metal from the element body surface to inside thereof by heat treatment, and coating of an insulative glass layer is unnecessary as being different from the related art, so that a complicated facilities and processes are unnecessary and a highly reliable chip shaped electronic device can be produced easily at a low cost.